Microprocessor operational instructions may be so-called dual-issue instructions, characterized as having a part of the instruction needed for an execution unit of the microprocessor, such as a Fixed Point Unit (FXU) or a Floating-Point Unit (FPU) of the microprocessor, and a part of the instruction needed for a non-execution portion of the microprocessor, such as a Load-Store Unit (LSU). Methods currently known for dual-issuance of microprocessor operational instructions for use with store instructions are useful for a microprocessor architectures characterized as having only a small subset of its instructions as dual-issue instructions. Microprocessor architectures that make greater use of dual-issue instructions, such as a register-memory architecture, require more robust ways of dependency tracking than is currently available.